Promwad at Microchip European MASTERs 2026: Camera-to-Screen Video Latency, Timed in Hardware

MASTERs 2026

Promwad participated in Microchip European MASTERs 2026, held October 12–15 in Munich, Germany. Our team brought a live demo built on Microchip PolarFire FPGA technology and ran it for engineers during the conference, measuring the glass-to-glass latency of a video system from camera input to display output.

MASTERs (Microchip Annual Strategic Technical Exchange and Review) is a training conference, not a trade show: four days of classes taught by Microchip's own engineers and ecosystem partners, with more than 80 sessions and 40 demonstrations on the floor. The audience is engineers in the middle of real projects, so a measurement rig made more sense than a slide deck.

Measuring Real Video Latency with PolarFire FPGA

One of the harder problems in real-time video development is verifying that the complete processing pipeline meets its latency requirement. Measurements taken at individual stages rarely add up to the delay the system actually produces, and a result can look perfectly stable while carrying a hidden bias. 

The setup Promwad showed in Munich tackles this physically. A light source, an LED or a laser, sits in front of the camera, and a photodetector watches the point on the monitor where the flash will appear. The PolarFire FPGA switches the light on, starts a counter, and stops it when the detector registers the flash on screen. The count covers every stage in between: sensor, image processing, encoding, transport, decoding, scaling, and the display panel itself. 

One detail decides whether the result can be trusted. A camera samples the world in frames, so a rig that fires at a fixed rhythm keeps landing at the same point in the frame cycle and skews every reading the same way. The core varies the interval between flashes at random, turning that effect into noise that averages out across a run. Engineers end up with a distribution of real latency rather than one convenient number. The rig runs unattended and logs a record per cycle, flagging readings spoiled by ambient light, a dropped link, or an image left on screen from the previous flash. 

The meter connects to the system under test at only two points: the light at the lens and the detector at the screen. Everything between them can change freely, which makes it a like-for-like bench for comparing pipelines: hardware versus software encode, a different codec, a different transport, or the same design before and after a firmware update. 

The same question comes up across broadcasting and Pro AV, machine vision, industrial robotics, and automotive camera systems, where predictable video latency is part of the requirement rather than a nice-to-have.

Engineering Exchange at MASTERs

The conference program centered on functional safety, machine learning and edge AI, and power electronics, the areas where embedded teams are currently making architectural decisions. 

Conversations with technology providers covered AI-assisted schematic design, automated generation of board support packages and drivers, and Hardware-in-the-Loop testing for embedded control systems. The common thread is automation moving into work that engineering teams still do largely by hand: at three different points in the cycle, from first schematic to system verification. For a design house, that shifts where the effort goes: less on routine, more on architecture and validation. 

Continuing Our Work with Microchip Technology

The latency meter is one example of what we build on Microchip silicon: a focused instrument made to answer a specific engineering question. As an authorized Microchip Design Partner, Promwad works across a considerably wider set of domains: 

Continuing Our Work with Microchip Technology

 

Planning a product on Microchip silicon? We take it from architecture to production.