Industrial-Standard FPGA Solutions

AC/DC converters with PFC IP core

DC/DC for solar power systems

IP cores: ADC_RX, PI/PID controller, PWM, 2p2z compensator, 3p3z compensator, MPPT

We develop cutting-edge DC/DC converters that target a wide range of power applications, focusing on industrial automation and electric power systems.

DC/AC for power applications

IP cores: ADC_RX, PI/PID controller, PWM, Notch filter, Sin/Cos generator, current calculation, GPIO

We design high-power FPGA solutions that can be used in DC/AC converters and go beyond the capabilities of traditional microcontrollers and DSPs.

PFC, four-phase interleaved boost converter

IP cores: ADC_RX, PI/PID controller, LFD, current ref calculation, power calculation, PWM

The four-phase interleaved boost converter (PFC) is a cutting-edge circuit design that builds upon traditional boost converters. Unlike the original design, which operates in parallel, the PFC utilises an interleaved approach, where the number of parallel boost converters depends on the circuit load.

Three-phase active power filter (APF) with first harmonic detectors (FHD) control circuit

IP cores: PI/PID controller, first harmonic detector, ADC_RX, PWM

The three-phase active power filter (APF) is an advanced technology to compensate for higher harmonics in electrical systems.

This compensator utilises three first harmonic detectors (FHDs) to calculate the compensation currents (Ic). The compensation process involves subtracting the first harmonic component (IH1) from the load current (IL) to achieve a cleaner and more stable output.

PQ algorithm for active power filter (APF)

IP cores: Clark, park, high-pass filter, park inverse, Clark inverse, ADC_RX

The p-q algorithm is based on a set of instantaneous powers that can be calculated from voltage and current waveforms without restrictions on their shape or amplitude. This solution can be applied to three-phase systems regardless of whether they have a neutral wire or not.

Motor control for BLDC/PMSM/ACIM (sensored)

IP cores: PID, ADC_RX, encoder, SVPWM, PWM, Clark, park, high-pass filter, park inverse, Clark inverse

We designed a sensored motor control for brushless DC (BLDC), permanent magnet synchronous motors (PMSM), and AC induction motors (ACIM) for real-time monitoring of the motor's position and speed, providing a high level of control and accuracy through sensors. It enables improved product quality, increased productivity, and reduced downtime in the manufacturing processes.

Motor control for BLDC/PMSM/ACIM (sensorless)

IP cores: PID, ADC_RX, SVPWM, PWM, Clark, Park, high-pass filter, Park inverse, Clark inverse

Sensorless control of brushless DC (BLDC), permanent magnet synchronous motors (PMSM), and AC induction motors (ACIM) allows businesses to achieve significant cost savings by eliminating the need for physical sensors. This technology uses advanced algorithms to estimate the position and speed of the motor based on its electrical signals.

Motor control for BLDC/PMSM/ACIM (sensored), TLI (three-level inverter)

IP cores: PID, ADC_RX, encoder, SVPWM, PWM, Clark, Park, high-pass filter, Park inverse, Clark inverse

Sensored motor control for brushless DC (BLDC), permanent magnet synchronous motors (PMSM), and AC induction motors (ACIM) allow for real-time monitoring of the motor's position and speed, providing a high level of control for robotics, automation, and transportation.

FPGA-based servo drive for industrial applications

IP cores: PID, ADC_RX, encoder, SVPWM, PWM, Clark, Park, high-pass filter, park inverse, Clark Inverse

We design servo drives based on FPGA to change the way businesses approach motion control. These highly customisable integrated circuits can be programmed to perform digital signal processing, control logic, data storage, and other functions.

Back-electromotive force (BEMF) observer for permanent magnet synchronous motors (PMSM)

IP cores: PI/PID, Park inverse, Clark inverse, Sin/Cos

A BEMF observer is a sensorless control algorithm that estimates the rotor position of the PMSM, eliminating the need for physical sensors. The BEMF observer for PMSM on FPGA technology can be used in robotics, automation, and transportation.  

Inkjet printer controller

IP cores: sensored FOC BLDC, inkjet printer controller, PCIe

Single-pass inkjet printing systems require specialised logic to form images on paper accurately. To achieve this, our engineering team used separate IP cores to control the paper feed speed and the transfer of RAW images from memory.

The print controller utilises the speed setting provided by the IP core that is in charge of controlling the paper feed speed. This separation of functionality allows the system to be seamlessly upgraded.

Multi-encoder master IP core interface

IP cores: EnDat 3, HIPERFACE DSL, SCS open link

We designed a solution for the multi-protocol position encoder interface to simplify the integration of fully digital encoder interfaces such as EnDat 3, Single Cable Solution (SCS) Open Link, and HIPERFACE DSL into industrial systems. This IP core is part of a black channel, meaning it does not require examination from a safety perspective, which greatly facilitates system integration.   

6-axis robot controller

IP cores: PCIe, 6 servo drive

Integrating servo drive IP cores into an FPGA is a robust solution for achieving optimal performance in robotics solutions. We ensured high precision and control by using up to 6 servo drive IP cores per FPGA.   

EtherCAT slave

IP cores: RGMII controller, loopback functions, asynchronous FIFO, AXIS switch, EtherCAT FMMU, SM, DPRAM, time module, memory controller

EtherCAT is an Ethernet-based fieldbus system for industrial automation. It ensures fast and precise communication between devices.

Design of 3D lidar

IP cores: register file, AXI DMA, CPACK, RX JESD TPL, RX JESD LINK, JESD PHY, SYNC, TIA channel sequencer, PWM, motor control, laser driver IP, memory interconnect, PCIe

High-level specification

Key features:

• Horizontal resolution of 16 pixels
• Data sampling up to 1GSPS on 4 separate channels
• The design is verified to comply with class I laser safety
• Standardised FMC connector plugs into the FPGA board of choice

AFE Board

The AFE board contains a 16-channel APD from the first sensor and 4 ADI LTC6561 Quad channel TIA's with necessary power and timing signal chains. Custom optics can be fitted to the board using industry-standard mounting adapters based on individual use cases.

Design of automatic transfer switch (ATS)

IP cores: RMS, SAG, SWELL, power factor, apparent power, reactive power, real power, period and phase angle detector, timer, prediction control, FFT, filter, interrupt controller, memory controller, ADC_RX, logic ATS, ZCR detector

An automatic transfer switch (ATS) is an essential technology for ensuring the uninterrupted operation of network equipment. ATS solutions can be implemented using microcontrollers or DSPs, but FPGA technology provides greater flexibility and reliability.

Three-phase electrical network analyser

IP cores: RMS, SAG, SWELL, power factor, apparent power, reactive power, real power, period and phase angle detector, FFT, filter, interrupt controller, memory controller, ADC_RX, ZCR detector, register file

We used FPGA technology to develop an advanced solution for power quality analysis. This new three-phase network analyser can be implemented using various hardware platforms.

Mass flow metering

IP cores: ADC_RX, low-pass filter, Fourier analysis, register file, PID/PI controller, sine wave synthesis, SUM, zero-crossing detection (ZCR), drive synthesis control, DAC_TX, memory controller, calculate sine wave synthesis parameters, calculate balance terms

Coriolis mass flow measurement technology is the most accurate and reliable method for direct mass flow measurement. This technology utilises the Coriolis effect, where the oscillation of a vibrating tube is distorted by the flow of fluid passing through it, to measure the mass flow of fluids.