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promwad FPGA & SoC design services
FPGA & SoC
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FPGA & SoC Design Services: From RTL to Production-Ready Platforms

FPGA logic is where your product’s latency, throughput and lifecycle risks meet. When FPGA development hits a technical or capacity bottleneck, the entire product schedule feels it — and senior FPGA expertise is rarely available in-house exactly when you need it. 

Promwad takes engineering ownership of that critical part: a design review, a project rescue, a migration or a single IP core, delivered by 20+ FPGA engineers. When you need more, the same team extends into PCB and embedded software, minimizing integration risks. 

Andrei Smirnov
Talk directly to an FPGA engineer!

Andrei Smirnov, Solution Architect at Promwad

FPGA & SoC Design Services: Start Where It's Critical

Most of our FPGA engagements begin with one critical task. Choose your entry point, and we expand into adjacent hardware and software layers only when you need it. 

Five ways to start

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FPGA Design Review & Feasibility

You have a legacy design, a draft architecture or a new idea, and you need an independent senior engineer view before committing budget. We assess the architecture, RTL, constraints, resource and power budgets, and the silicon choice. You get a written assessment.

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FPGA Project Rescue

Timing won't close, bring-up is unstable or interfaces fail intermittently. We find the root cause, clean up constraints and clock-domain crossings, close timing and debug on real hardware with built-in diagnostics. You get a stable design and documented fixes your team can maintain.

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Migration from End-of-Life Silicon

Your FPGA is reaching end-of-life or your BOM has outgrown its margins. We move proven logic to a current device family without starting from scratch. See how we migrate ↓

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IP Core or Subsystem, Turnkey

Your team owns the system but needs one block delivered: a PCIe DMA engine, JESD204B data capture, an SDI gearbox or a 10G UDP offload. You get a verified core with testbenches, documentation and integration support.

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New FPGA + SoC Platform

You are building a new product. We cover architecture, RTL, high-speed PCB, bootloaders, Embedded Linux and drivers, prototypes and production support. You get a production-ready platform with full source code and CAD files.

Explore Our FPGA Expertise

30+ short case studies on AMD, Altera, Lattice, Microchip and NVIDIA platforms.

Explore the library

motor control for BLDC, PMSM and ACIM, up to 6 servo drives on one FPGA, power conversion, EtherCAT, HSR/PRP and safety PLCs.

Explore industrial FPGA

low-latency inference and hardware acceleration for vision, broadcast, automotive and industrial edge devices.

Explore FPGA for AI

custom frame grabbers for CoaXPress, Camera Link, USB3 Vision and SD/HD-SDI, with Linux and Windows drivers.

Explore FPGA for video processing

FPGA-based prototyping, ZeBu and HAPS emulation, pre- and post-silicon validation, drivers and bring-up tests for RISC-V SoCs.

Explore ASIC verification

Need the rest of the system? Our High-Speed PCB Design, Embedded Linux, Edge AI and Embedded Security engineers work in the same delivery structure. 

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Why Product Companies Choose Promwad for FPGA Design

Most FPGA risks sit at the boundary between logic, board and software, and that boundary is exactly where our team is built to work 

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One team from logic fabric to Linux driver

FPGA logic, high-speed PCB, bootloaders, Embedded Linux and Windows drivers are owned by one cross-functional team with one point of accountability

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Senior engineers who have done it before

20+ FPGA engineers inside a 100+ engineer organisation, building since 2004. They cover RTL, DSP in MATLAB/Simulink, HLS, high-speed boards and drivers

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Built-in security & compliance

Promwad is certified to ISO 9001 and ISO/IEC 27001. Our automotive vision work follows ASPICE CL2 and ISO 26262 ASIL-B. Also, we built an FPGA platform that validates bitstreams with post-quantum signatures

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Cross-industry expertise

We build FPGA-based products for OEMs and product companies across Europe and the US, in rail safety, commercial vehicles, medical imaging, broadcast and pro AV, industrial automation, and test and measurement. Our engineers know your industry’s standards

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Vendor-neutral silicon choice

As a partner of AMD, Altera, Lattice and Microchip, we choose the device for your performance, power, BOM and lifecycle targets

Our FPGA Tech Stack

We pick the stack to fit your performance, power and lifecycle targets  

Microchip

PolarFire, PolarFire SoC, SmartFusion 2, IGLOO 2

AMD

Versal, Zynq UltraScale+ MPSoC and RFSoC, Zynq-7000, Kria SoM, Virtex, Kintex and Artix UltraScale+, 7 series, Spartan

Board form factors

PCIe, Mini-PCIe, FMC and FMC+ (VITA 57.1/57.3), PXIe, PC/104, MicroTCA/AMC, openGear, SoM

Video and broadcast

3G/12G-SDI, SMPTE ST 2110 with NMOS and PTP, HDMI, DisplayPort, MIPI CSI-2 and D-PHY, CoaXPress, Camera Link, USB3 Vision

Altera

Agilex, Stratix, Arria 10, Cyclone V and Cyclone 10, MAX 10

Languages and design methods

VHDL-2008, Verilog, SystemVerilog, HLS, MATLAB/Simulink with HDL Coder, C/C++, Python

Tools and verification

Vivado/Vitis, Quartus Prime, Radiant/Diamond, Libero, cocotb, ZeBu and HAPS emulation

Processor cores

ARM Cortex-A and Cortex-R, RISC-V, MicroBlaze, Nios II

Lattice

CrossLink-NX, Certus-NX, ECP5, MachXO3, iCE40, senseAI stack

High-speed interfaces

PCIe Gen3 with multi-channel DMA, JESD204B, Ethernet 1G/10G/25G/100G, DPDK, RDMA, DDR4, LPDDR4, HyperRAM

Software around the FPGA

Bootloaders, bare-metal, Embedded Linux and PetaLinux BSPs, Linux and Windows drivers, V4L2/GStreamer, CUDA

Industrial and timing

EtherCAT, PROFINET, HSR/PRP, IEEE 1588, IEEE C37.94, EnDat 3, HIPERFACE DSL

FPGA Solutions by Industry

The same engineering foundation serves very different products: wherever data rates, timing or lifecycle make a processor alone the wrong answer. 

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Industrial Automation & Robotics

Run many control loops in parallel with deterministic timing. Sensored and sensorless motor control, up to 6 servo drives per FPGA, power conversion and PFC, EtherCAT and PROFINET, HSR/PRP for IEC 61850 networks, and FPGA-based safety PLCs. FPGA for Industrial & Robotics → 

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Automotive & Transportation

Process camera and radar data in real time under safety requirements. A 360° vehicle vision system on one Lattice CrossLink-NX developed to ISO 26262 ASIL-B, a rail safety edge platform with a 10+ Gbit/s sensor pipeline, radar data processing on Zynq UltraScale+ and low-cost video pipelines for transport displays. Automotive engineering → 

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Telecom, SATCOM & RF

Turn RF and network data into packets at line rate. An RFSoC carrier board with 8 Rx/Tx channels at up to 6.5 GSPS, SDR satellite modems with DVB-S2(X) and MF-TDMA, hardware 10G UDP offload, and 38 Gbit/s FPGA-to-server transfer over 4×10G. Telecom engineering → 

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Broadcasting & ProAV

Move uncompressed video with frame-accurate latency. A 12G-SDI to SMPTE ST 2110 gateway for uncompressed 4K60, ST 2110-30 audio with sub-1 ms PTP synchronisation, openGear processing cards, 4K framebuffers and hot-swappable CFexpress storage for 8K+ RAW. Broadcast FPGA solutions → 

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Test & Measurement, Scientific & Medical

Capture fast signals without losing a sample. Nanosecond pulse analysis on six Kintex UltraScale boards with 3.2 GSPS ADCs, ultrasonic inspection architecture, X-ray imaging across 80 CMOS sensors and an IR laser controller with 3 GHz ADC/DAC sampling.

Not sure an FPGA is the right choice for your product?

One call with our engineer will show whether FPGA, SoC, GPU or MCU fits best.

FPGA Migration & Modernization

Your product works, but its silicon is ageing. We move proven logic to a current platform and keep what already works, instead of redesigning from scratch.

When migration pays off 

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End-of-life devices

Spartan-6 and Virtex-6 designs move to UltraScale+; Cyclone V and Arria 10 designs move to Agilex

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BOM and power pressure

Suitable designs move to lower-cost, lower-power Lattice or Microchip PolarFire devices

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Consolidation

Several chips or boards are replaced by one FPGA or SoC FPGA, cutting cost, power and assembly steps

How we migrate 

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Audit the existing RTL, vendor IP, constraints and board design

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Select the target device by performance, power, BOM and long-term availability

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Port the logic and replace vendor-specific IP

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Re-verify behaviour against the original design

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Update the board and bring up the new hardware

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Validate the product and hand it over to production

Our FPGA Case Studies

Four projects, four industries, one pattern: we start at the critical point and own the result. 

Lossless 12G-SDI ↔ quad-link 3G-SDI gearbox for Lynx Technik

Broadcasting & ProAV

Challenge. Lynx Technik AG, a German maker of professional broadcast and A/V equipment, needed a next-generation converter for real-time UHD signal exchange between single-link 12G-SDI and quad-link 3G-SDI. The conversion had to work in both directions without signal loss. 

Solution. We designed the schematic, the PCB and the FPGA firmware for a 3G/12G-SDI gearbox on Altera Cyclone 10 GX. Semtech cable equalisers and drivers form the SDI physical layer, and 8 Gbit of DDR3L serves as the memory buffer. The firmware supports four conversion paths in both 2SI and SQD modes. 

Result. The client got a compact building block for real-time UHD signal exchange in broadcast workflows, with lossless conversion in both directions. Issues were caught and fixed in testing before the product was released. 

Stack: Altera Cyclone 10 GX · 12G-SDI / 3G-SDI (2SI, SQD) · SDI over SFP+ · DDR3L · Semtech SDI PHY
 
Read the 12G-SDI gearbox case →

FPGA Firmware Development for Serial and GPI Fibre Transceiver for Broadcasting
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360° vehicle vision consolidated into one Lattice FPGA

Automotive & Transportation

Challenge. A leading supplier of vision systems for commercial vehicles depended on discontinued components and several separate devices, which raised cost, power and assembly complexity. 

Solution. We re-engineered the video architecture around Lattice CrossLink-NX: capture, per-channel mirror, rotate and scale, and display in one chip, for both MIPI CSI-2 and analog NTSC/PAL cameras. 

Result. The same form factor with fewer parts, one hardware design for multiple SKUs through FPGA reprogramming, developed under ASPICE CL2 and ISO 26262 ASIL-B. 

Stack: CrossLink-NX · MIPI D-PHY up to 2.5 Gbps per lane · NTSC/PAL
 
Read the 360° vehicle vision migration case → 
 

360-Degree Camera System Development for Trucks

FPGA security platform with post-quantum cryptography

Industrial & critical infrastructure

Challenge. Edge devices stay in the field for 10–20 years, so their firmware protection has to outlast today's cryptography and fit the EU Cyber Resilience Act. 

Solution. A custom board pairing a Lattice FPGA with a SEALSQ QVault TPM. Every bitstream is checked against a post-quantum signature before it runs, with rollback protection and anomaly filtering. 

Result. Unsigned firmware is blocked in hardware, cryptographic logic can be updated in the field without a recall, and the platform was demonstrated live at Embedded World 2026. 

Stack: Lattice FPGA · SEALSQ QS7001 (CC EAL5+, FIPS 140-3 Level 3)

Read the post-quantum FPGA platform case →

FPGA security platform with post-quantum cryptography

12 µs closed-loop correction for a satellite antenna on the move

Telecom & SATCOM

Challenge. A world leader in mobile satellite antennas computed phased-array correction factors on a CPU. At more than 15 µs per cycle, the system reacted too slowly to keep a vehicle-mounted antenna locked on the satellite while moving. 

Solution. We moved signal analysis and correction-factor generation to a custom AMD Artix-7 board. Fixed-point algorithms recalculate phase, amplitude and their corrections, and exchange data with the host and the RF section over SPI. A tech lead and an FPGA developer worked in stages, with lab and field tests on the client’s side after each stage. 

Result. Corrections reach the antenna in 12 µs, 3 µs faster than the target. The client can now tune the phased array remotely and keep a high-quality satellite link on moving vehicles in near real time. 

Stack: AMD Artix-7 · fixed-point DSP · SPI · phased-array antenna control
 
Read the satellite antenna FPGA case →

Closed-Loop Antenna System for Improved Satellite Signal Reception

How We Ensure Quality in FPGA Design

Predictable FPGA delivery means catching problems in simulation and on the bench, not in the field.

Our delivery process 

Discovery and feasibility
Architecture and specification
RTL development
Simulation and automated testing
Timing closure and optimisation
Hardware bring-up
System validation
Handover

Built around your team

You get access to our repositories and artefacts, weekly syncs and joint design reviews and acceptance tests, with key decisions logged. CI regression and hardware-in-the-loop test benches are available on request for programmes that need them. 

Our Cooperation Models

Flexible approach to suit your current needs

Number one

Time & Material

Perfect for evolving projects. You control the budget and milestones, while we ensure transparency and fast team scaling.

Number Two

Dedicated Team

Your long-term engineering capacity — a self-managed, domain-focused team integrated into your workflow for steady, predictable delivery.

Number Three

Fixed Price

Ideal for well-defined tasks with clear outcomes. Scope, budget, and timelines are set upfront to guarantee predictable results.

Trusted by Silicon Vendors and OEMs

The companies that make the silicon work with us, and so do the OEMs that ship it. 

amd

AMD

Embedded Partner Program, Select tier 

altera

Altera

Solution Acceleration Partner (ASAP)

lattice

Lattice Semiconductor

Certified Design Partner and FAE Service Partner

microchip

Microchip

Authorized Design Partner

What Our Partners Say

Robert Green AMD
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"Promwad has a solid grasp of AMD technologies — especially on the FPGA side. Their engineers go beyond the spec sheet: they understand the architecture, anticipate edge cases, and know where the real complexity lies.

In broadcasting and pro AV, that level of technical depth is hard to come by. Promwad delivers it consistently, and it shows in the quality of what they build."

— Robert Green, Senior Manager (Pro AV, Broadcast & Consumer), AMD.

Start Your FPGA Design Where It's Critical.
Scale with One Partner.

Tell us where your FPGA project hurts most: a design that won't close timing, a device going end-of-life, or a platform that has to ship next year. You will talk to an FPGA engineer.

 

Tell us about your project

We’ll review it carefully and get back to you with the best technical approach.

All information you share stays private and secure — NDA available upon request.

Prefer direct email?
Write to info@promwad.com

Secured call with our expert in 24h
Secured call with our expert in 24h
Embedded in your team, end-to-end engineering
Embedded in your team, end-to-end engineering
22 years of engineering expertise
500+ projects for OEMs in EU & US
500+ projects for OEMs in EU and US
22 years of engineering expertise
MVP in 8–10 weeks
MVP in 8–10 weeks — predictable delivery
Featured at IBC, Embedded World, MWC
Featured at IBC, Embedded World, MWC

FAQ

What do your FPGA design services include?

 

Our FPGA design services cover specification and architecture, RTL development in VHDL, Verilog and SystemVerilog, DSP through MATLAB/Simulink and HLS, IP core development and integration, verification and timing closure. Around the FPGA we design high-speed boards and write bootloaders, Embedded Linux BSPs and drivers. You can hand us one task or the whole platform.
 

Which FPGA vendors do you work with?

 

We are partners of AMD, Altera, Lattice Semiconductor and Microchip, and work with their current families including Versal, Zynq UltraScale+, Agilex, CrossLink-NX and PolarFire SoC. We recommend a device based on your performance, power, BOM and lifecycle requirements.
 

Can you take over or review an existing FPGA project?

 

Yes. We start with an audit of the RTL, constraints, vendor IP and board. Then we either fix the issues ourselves — timing closure, unstable bring-up, interface failures — or hand your team a prioritised list of recommendations.
 

How do you migrate a design from an end-of-life FPGA?

 

We audit the existing design, choose a target device, port the logic and replace vendor-specific IP, then re-verify behaviour against the original. Typical paths are Spartan-6 or Virtex-6 to UltraScale+, Cyclone V or Arria 10 to Agilex, or a move to Lattice or PolarFire to reduce BOM cost.
 

Do you also design the board and the software?

 

Yes. As a hardware design company with embedded systems development in-house, we deliver high-speed PCBs for FPGA and SoC platforms, Linux and Windows drivers, bootloaders and application software — so the FPGA works as part of a finished product.
 

When is an FPGA a better choice than a GPU or MCU?

 

An FPGA fits when you need deterministic latency, many parallel I/O channels, custom interfaces or a long product lifecycle. A GPU is usually better for large neural networks. Many systems combine both: in our rail safety platform, an FPGA pre-processes sensor data and an NVIDIA Jetson runs the analytics.
 

How long does an FPGA project take?

 

It depends on scope and complexity. A design review or discovery phase usually takes 1–2 months; a new platform takes longer. We set realistic milestones during specification and keep you updated weekly.
 

How are NDA and intellectual property handled?

 

We sign an NDA before discussing details, and IP ownership is defined in the contract. At the end of the project you receive the source code, constraints, testbenches, documentation and PCB design files. We mention your project publicly only with your permission.