FPGA programming background

FPGA Design

Get Advanced FPGA Design Development Services

We'll guide your project from concept to completion

Promwad has 20 years of experience, during which we have consistently achieved high results in developing quality FPGA/MPSoC/RFSoC firmware solutions for our partners, ensuring that each project meets their requirements: budget, power consumption, and performance objectives.

We design and integrate IP cores, interface controllers, data processing algorithms, and processor cores, and create custom application-specific integrated circuits within our ASIC design services. Check out our partner’s success stories and the business value we've delivered for them. 

We’d love to hear about your project!

Partnerships with the World Leading Vendors

We have permanent support from the leading FPGA vendors, including Xilinx, Lattice Semiconductor, Intel, and Microchip, to provide comprehensive embedded software development services.

Lattice Semiconductor
We have gained comprehensive experience working with Lattice solutions, which are popular among FPGA design companies. Here are a few examples: iCE40 series with the smallest form factor, MachXO3 family for control & security applications, ECP5, and more. We offer you the fastest time to market using Lattice programmable logic devices and solution stacks in your FPGA design projects.
Providing FPGA development services, we have accumulated expertise in working with various Xilinx FPGAs with integrated CPUs such as the Zynq-7000 series and Zynq Ultrascale+, as well as those without integrated CPUs like Spartan, Artix, Kintex, Virtex, and XC-series. We also use Vivado Design Suit and Vitis AI. As a Xilinx partner program member, we are the first to access the new solution updates.
As an official Intel partner, we help integrate high-speed transceivers, logic blocks, high-speed I/Os, configurable embedded SRAM, routing, as well as intellectual property (IP). We work with Intel software tools to get the optimal development time, costs, and power. Here are the exampes of Intel FPGA we work with in our projects: Intel Agilex, Intel Stratix, Intel Arria, Intel Cyclone, and Intel Max series.
As a FPGA design firm, we assist our clients in high-data throughput and high-bandwidth connectivity working with Microchip programmable logic devices, including FPGAs (PolarFire, IGLOO and IGLOO 2, ProASIC 3, Fusion Mixed-Signal FPGAs), SoC FPGAs (PolarFire, SmartFusion and SmartFusion 2), radiant-tolerant and antifuse FPGAs.

Check Our FPGA Project Expertise

As a FPGA design company, we perform the following activities:

  • Specifications development.
  • Architecture definition, selection of IP cores, including UFS IP cores.
  • RTL descriptions development in VHDL/Verilog.
  • DSP cores in Matlab Simulink (DSP – Digital signal processing).
  • HLS — High-Level Synthesis. Logical and physical synthesis.
  • Adaptation of IP cores to various FPGA families.
  • FPGA based on AI-powered technologies.
FPGA design background
Ready to get started with your FPGA project? Contact Promwad today, let's bring your vision to life.

Our FPGA, SoC, MPSoC Solutions

Explore the complete list of case studies categorised by vendors here.

Automated at-factory tests for FPGA-based boards

Tags: Zynq US+, FMC, SATA, DDR, USB

We provided full life cycle support in FPGA-based board design. Our team developed firmware for at-factory automated tests based on UltraScale+ SoC boards. The automated tests cover all external PL and PS interfaces. The tests include DDR memory (PL and PS), FMC high-speed and low-speed lines, SATA, USB, clocking, etc.


Multi-electronic driver array and multi-electronic monitor array

Tags: Gowin, Xilinx, FPGA, USB 3.0, FTDI, PWM, ADC, Raspberry, Linux

  1. Multi-electronic driver array (MEDA) based on Xilinx Spartan-7 by AMD: the unit sends the control signals to the programmable photonic integrated circuit. It programs the electrical power driving 128 channels connected to the programmable photonic integrated circuit.
  2. Multi-electronic monitor array (MEMA) based on Gowin GW1N: the unit reads the optical power monitors of the programmable photonic integrated circuit, closing the control loop. These monitors provide the information to compare the actual output with the expected one and update the MEDA's control signals.

Bootloader development for the NX FPGA family

Tags: Lattice, RISC-V, bootloader, FPGA, Certus-NX, Сrosslink-NX

Development of a bootloader for the Lattice NX family with support for external QSPI flash memory. The project included hardware validation on dev boards based on Crosslink-NX and Сertus-NX. The SDRAM IP core can be adapted to the NX architecture and used with the RISC-V synthesizable core.  
Certus-NX FPGA

Firmware and software development of FPGA-based microscope

Tags: Zynq US+, Linux, Driver, SPI, XY2-100

Development of simple microscope firmware and software including signal generator for driving 2D scanners. Additional requirement was a software update opportunity for our customer's service, which is capable of updating the microscope firmware including the FPGA bit file. Signal generator provides automatic intermediate points generating using a second degree polynomial for analog channels.
Firmware and software development of FPGA-based microscope

Analog frontend real-time controller

Tags: Zynq US+, SDR, AGC, IQ, AFE

AGC, IQ imbalance compensation, and DC removal algorithms have been implemented in Zynq Ultrascale+/. The IP cores and software controls analog frontend board ICs provided parameters in real-time. AGC is table-based. IQ and DC techniques use surrogate optimization algorithm over ADC and mixer tunable parameters. 
Analog front-end real-time controller

Unpredictable impact deterministic detecting on CPU and parts

Tags: RISC-V, Test, Real-time determenistic

We designed and developed a library for real-time CPU internal tests. The test included internal and peripheral buses, internal CPU blocks, etc. The main idea is to immediately (deterministic time) detect any faults caused by any impact (including electromagnetic pulse).

Unpredictable impact deterministic detecting on CPU and parts

LVDS to MIPI CSI-2 video bridge with image processing

Tags: Artix7, Spartan7, CPU, MIPI CSI, LVDS, FTDI, Image processing, Image sensor
Cost-effective LVDS to MIPI CSI-2 video bridge with image processing:

– input video resolution: 1920x1080 pixels
– input framerate: 1000 fps
– configurable MIPI CSI-2 parameters (default 1920x1080@30)
– frame decimation or double buffering for reducing video stream data
– configurable image processing parameters with FTDI interface
LVDS to MIPI CSI-2 video bridge with image processing

ADC/DAC repeater

Tags: Kintex Ultrascale, MicroTCA, JESD 204B, Linux, PCIe
We designed firmware for the MicroTCA system for buffering data from ADC in CPU x86 system and translating it to the DAC.

– 1 Gsps ADC x8 channels 
– 2.8 Gsps DAC x8 channels
– PCIe
ADC/DAC repeater

Hybrid video capturing and processing device

Tags: Lattice, ECP5, HDMI, MIPI, H.265 
Video stream capturing, h.265 compression, and streaming to the Internet. Lattice ECP5 used for video preprocessing and i.MX8 based SoM for compression, streaming, and user logic.

Hybrid video capturing and processing device

X-Ray sensors module

Tags: Lattice, ECP5, CMOS 
A small PCB module with 2xCMOS sensors and Lattice ECP5 for control and image processing.



X-Ray sensors module

JESD204b data transfer to Linux

Tags: ZynqUS+, JESD204b, Llinux, ADC, DAS 
A design for high-speed ADC and DAC capturing and streaming from/to PS DDR4 memory. The subsystem runs under Linux application control.

JESD204b data transfer to Linux

Printer controller

Tags: Xilinx, PCIe, Motor, Artix7

Custom solution for industrial printer motor control logic and raster image feeding.

Printer controller

Interface Extension FPGA project

Tags: Artix-7, MCU, ADC, SPI, I2C
Interface Extension FPGA project.
– big-endian and little-endian support for EMIF;
– direct access mode for MCU to end-points;
– auto mode for polling end-points in round-robin;
– arbiter switch for changing modes of access;
– ADC controller with daisy chain support and internal configurable median filter

Interface Extension FPGA project

Zynq US+ 1G ethernet

Tags: ZynqUS+, Networking, 1G, RPU, Cortex-r5, UDP 
An implementation of UDP protocol with hardware Gigabit ethernet controller (GEM). The data can be transmitted both from PL and PS subsystems.
– Hardware UDP offloader
– AXI4-Stream data interfaces
– Control driver for RPU
– Packets routing between PL and PS using IP port 

Zynq US+ 1G ethernet

Zynq US+ 10G ethernet

Tags: ZynqUS+, Networking, 10G, UDP 
A hardware implementation of UDP protocol and 10G MAC.
– Hardware 10G UDP offloader
– AXI4-Stream data interfaces 

Zynq US+ 10G ethernet

10G TCP/IP using Linux

Tags: ZynqUS+, Linux, 10G, TCP/IP, DDR4
The design solves the problem of reliable data transfer from PL to server. Data transferred directly from PS DDR4 via TCP/IP protocol. The achieved bandwidth is 3.5Gb over a 10G interface.

10G TCP/IP using Linux

12G-SDI processing

Tags: Kintex7, Linux, PCI-E, SDI, Drivers
The design included in the Viewfinder product. Kintex-7 captures 12G-SDI signal, transmits video data to x86 CPU via PCIe. The Linux receives a video stream using a custom-designed V4L2 driver and outputs to the display.

12G-SDI processing

4k HDMI frame buffer

Tags: Kintex7, Linux, PCI-E, HDMI, 4K, Drivers
– Linux driver for frame buffer
– Data transfer between x86 CPU and Kintex-7 via PCIe
– DDR3 for image buffering
– Two HDMI output interfaces

4k HDMI frame buffer

3G-SDI stream H.265 compression

Tags: Kintex7, Linux, PCI-e Jetson Nano, Drivers, H.265, SDI 
The device compresses a 3G-SDI input stream with the H.265 encoder. A V4L2 driver adapts the PCIe data stream to be processed by GStreamer and NVidia HW codec. Linux controls the output bitrate by network throughput estimation (QoS). The PCIe links and delivers a low latency encoding chain.

3G-SDI stream H.265 compression

Advanced PCIe End-Point IP core

Tags: Kintex, Ultrascale, Artix7, Linux, PCI-e, Arria10, CycloneV
A multiplatform PCIe controller core wrapper providing up to 10 DMA channels and 6 BARs.
– Linux driver
– Kintex UltraScale / Artix7
– Arria10 / CycloneV

Advanced PCIe End-Point IP core

Nano seconds pulses processing

Tags: Kintex, Ultrascale+, Linux, MicroTCA, PCI-e, HLS, Simulink, JESD 204b
We designed firmware for the MicroTCA system for the statistical analysis of nanosecond pulses parameters.
– 2.7Gsps ADC x24 channels
– High-level synthesis tools for math
– Data aggregation by Linux

Nano seconds pulses processing

Radar data processing

Tags: Zynq Ultrascale+, Cortex-R5, ARM, lvds, 10g
We designed a PCB and firmware for the ADAR6901 radar data processing.
– Zynq UltraScale+
– Cortex-R5 for radar control
– Driver and HAL development
– High-speed LVDS interface
– DDR4 PL for data storage
– 10G interface for processed data downstreaming 

Radar data processing

SoC firmware

Tags: SoC, RISC-V, FreeRTOS, Drivers, Bootloader
We’ve implemented firmware for a custom-designed SoC
– DesignWare IPs
– Bootloaders
– IPs bare-metal drivers
– Test environment
– User software

SoC firmware

3G/12G SDI gearbox

Tags: Intel, Cyclone10, SDI 
A complete device has been designed for 3G and 12G signal processing. A custom Gearbox IP core for 4x3G<->12G streams conversion has been delivered with 2SI and SQD modes support.

3G/12G SDI gearbox

Simple L2 switch IP core

Tags: Lattice, Ethernet
A single physical Ethernet port shared between the embedded CPU and MCU SoM. The stream is routed on the base of the device’s MAC addresses. 

l2 switch ip core lattice

Video decoding and output to TFT panel

Tags: Lattice, H.264, H.265 MIPI, Display

A video TS stream decoded by an iMX8 SoM module. Transmitted to Lattice FPGA using MIPI CSI-2 interface and displayed on the TFT panel.

Video decoding and output to TFT panel lattice

Image processing on ECP5

Tags: Lattice, Image Processing, HyperRam, Display

A video stream captured from HDMI interface. Then a chain of image processing operations takes place: white balance and gamma correction, cropping, scaling, and rotation. Finally, video displays on the TFT panel.

Image processing on ECP5

X-Ray imaging system

Tags: Lattice, CMOS, Xilinx, 1G

A complete device has been designed for image capturing from 80 X-Ray CMOS sensors. Image captured and pre-processed by Lattice MACHXO3, downstream to ARTIX7 motherboard as daisy-chain. FW update and other control operations mediated by external MCU.

X-Ray imaging system

Polarfire PCIe FMC carrier board

Tags: Microchip, Polarfire, FMC, PCI-e

We designed a high-end processing board with a PolarFire MPF500. Key features:

  • 8 lanes of PCIe Gen2
  • SPF+ cage
  • FireFly x4
  • Micro USB
  • 16 GB DDR4
  • FMC HPC connector
Polarfire PCIe FMC carrier board

Polarfire mini-PCIe board

Tags: Microchip, Polarfire, Mini PCI-e

We designed a miniPCIe board with a Polarfire MPF300. Key features:

  • IO connector with MGTs
  • 4 GB DDR4
  • PCIe x1, Gen 2
Polarfire mini-PCIe board

Polarfire mini-PCIe 3G-SDI card

Tags: Microchip, Polarfire, Mini PCI-e

We designed a miniPCIe 3G-SDI card with a PolarFire MPF300. Key features:

  • 3G-SDI recording and playback
  • 4 GB DDR4
  • PCIe x1, Gen 2
Polarfire mini-PCIe 3G-SDI card

BIOS emulation

Tags: Intel, HyperRAM, niosii, max10, qspi

MAX10+HyperRAM based BIOS emulator for secure Intel chipsets booting.

Polarfire mini-PCIe 3G-SDI card

Multirate filter

Tags: Xilinx, Simulink, HDLcoder, Artix7

A multirate filter IP core has been generated from the Simulink model using HDL coder toolbox. Signal was buffered in the DDR3 memory for delay implementation.

Multirate filter

Manufacturing testing equipment

Tags: Xilinx, ZynqUS+, MCU, tests

PCB and FW/SW for high-performance ZynqUS+ SoM modules tests at the manufacturing site.

Manufacturing testing equipment

CameraLink video grabber

Tags: CameraLink, Zynq US+, Linux, PCIE driver, video grabber.

We developed a video grabber from two CameraLink interfaces with the support of four modes: base (2.04 Gbps), medium (4.08 Gbps), full (5.44 Gbps), and extended (6.8 Gbps). We used a double-buffering mechanism in PL DDR memory for robust data transfers. The specific gearbox was developed to pack data from the camera to frames.

Oshawa 1

RFSoC ADC data capture

Tags: Zynq US+ RFSoC, ADC, SATA, SDR, I2C, SPI

We developed an ADC data capture system that captures data from 3 ADC channels, transfers them to the PS, and stores them in a SATA drive. The main problem that was solved was to transfer data without gaps from the PL to the PS side. In addition to data capturing, the ARM's software carries out clocking subsystem configuration via I2C/SPI interfaces.

Zynq UltraScale+ RFSoC is a single-chip adaptable radio platform.

Oshawa 2

Spherical camera system

Tags: Lattice, Crosslink-NX, MCU, DDR, MIPI-CSI, LVDS, SPI, LCD

We engineered a comprehensive camera monitoring system with full visibility (front, side, and rear views). The system processes four independent video streams sourced from four cameras operating in PAL/NTSC modes. Each stream undergoes scaling to a specified resolution and can be further rotated and mirrored. The scaled video streams are integrated into one of 25 available views.

The system users can add markings, enable a night mode with screen illumination facilitated by a built-in light sensor, and set brightness and other video parameters for each stream. All runtime configurations, including scaling and view-specific rotations, are adjustable and stored in external flash memory.

Connect with us for additional consultation on your FPGA!

Our Tech Map

Specialised tools

Vitis/Vivado, Quartus Prime, Diamond, Libero, Matlab

Software platforms

NVidia Jetson, Alveo, OpenVINO, TensorFlow, Keras, Caffe

Tools & Languages

Verilog, VHDL, VivadoHLS, Simulink/HDL Coder, С/C++, Python

Hardware design

High-speed PCBs, DDR4, JESD204b, HDMI, SDI, SI, PI, Thermo modeling


Zynq US+, RFSoC, Cyclone10, ECP5, MPF500


AD9361, AD9371, ADRV9009, Radars, Custom AFE, Antenas

Network protocols

DPDK, UDP 10G, TCP 10G, TAPs, L1/L2 IP cores


1G, 10G, 25G/40G, 100G

Alex Krainov, CTO of Embedded Engineering at Promwad

"In case you are planning a project in complex data processing or high-speed throughput it’s the best way to choose FPGA programming. Our experts are ready to provide top-notch hardware design & firmware development services. Moreover, we are ready to give a hand with PCB & Schematic design – our experts have strong experience preparing projects of any complexity to mass manufacturing."

— Alex Krainov, CTO of Embedded Engineering

Drop us a line about your FPGA design project and get a quote!

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