
IEEE 1588 PTP
Solutions with IEEE 1588 PTP for Network Switches, Routers, and Infrastructures
IEEE 1588 PTP-based network switches, routers, and data centre infrastructures are critical for time synchronisation across connected devices. PTP devices and network devices play a key role in achieving precise timing and synchronisation using the PTP protocol.
PTP enables packet-based two-way synchronisation with sub-microsecond accuracy when hardware timestamping is used. In software-only implementations, the accuracy is typically limited to tens or even hundreds of microseconds due to operating system and processing delays.
We enable the IEEE 1588 PTP support in software and hardware for diverse telecommunication devices. By integrating PTP devices for precise timing, and with advanced timestamping capabilities, our custom solutions align the clocks of various network elements with extremely low latency.
Clock Types in IEEE 1588 PTP
Grandmaster Clock
Boundary Clock
Ordinary Clock
Transparent Clock
How Does It Work?
IEEE 1588 functions by exchanging two-way timing messages between the master and slave clocks. The synchronisation process involves the exchange of PTP messages, including sync messages, announce messages, and follow up messages, between two clocks (master and slave) to synchronise clocks and achieve accurate clock synchronisation.
In PTP messages, the slave receives information about the time the master is on. Announce messages are used to establish which device becomes the Grandmaster. The delay is easily determined in this process.
Sync packets and PTP packets play a crucial role in the synchronization process by transmitting timing information. The protocol estimates the one-way message delay by halving the round-trip delay, under the assumption that forward and reverse path delays are symmetrical. In practice, any network asymmetry (e.g., queuing, different routing paths) can reduce accuracy, which is why hardware timestamping and network design considerations are critical in PTP deployments.

Benefits of IEEE 1588 Synchronisation Protocol
IEEE 1588 synchronisation protocol is essential for coordinating and aligning various components or processes within a system. It provides real-time applications with the following information:
- Precise time-of-day (ToD) information
- Time-stamped inputs
- Scheduled and synchronised outputs
PTP is the only widely standardized protocol for sub-microsecond synchronization over packet networks. Its application areas include mobile networks, industrial process control, audio/video networks, smart energy distribution, transportation, automotive, and IIoT.
How Promwad Adopts This Technology
The model range we employ:
- Ethernet switches: VSC7546TSN, VSC7549TSN, VSC7552TSN, VSC7556TSN, VSC7558TSN
- PHYs/10G PHYs: VSC8572, VSC8574
PTP configuration is managed according to IEEE 1588v2 and the relevant PTP profiles, ensuring compatibility and precise synchronisation. Proper domain selection is critical, as all PTP devices within a domain must operate consistently. Redundancy options are also configured to maintain reliability if the primary Grandmaster becomes unavailable.
PTP clocks, including master and slave roles, synchronise through standard PTP message exchanges (Sync, Follow_Up, Delay_Request, Delay_Response, and Announce). While software timestamps can be used, hardware timestamping on PHYs and switches is preferred to achieve sub-microsecond accuracy. Monitoring clock quality is essential, particularly during holdover or when integrating third-party Grandmasters.

Software Development with IStaX SDKs by Microchip
IEEE 1588v2 PTP is integrated as an application-level module within the IStaX SDKs. It operates on Microchip Ethernet switch hardware and is supported by a rewriter, egress port modules, and timing-aware PHYs.

IEEE 1588v2 is integrated as a module within the IStaX SDK, operating on Microchip SparX-5i Ethernet switches with hardware timestamping from timing-aware PHYs. Supported features include:
- Ordinary and Boundary Clocks with end-to-end and peer-to-peer delay mechanisms
- One-step and two-step Transparent Clocks
- Local clock servo and BMCA (Best Master Clock Algorithm) for Grandmaster selection
- Configurable sync intervals to balance message overhead and timing precision
- IPv4 multicast/unicast transport, with support for multiple masters in unicast mode
- Optional OCXO integration for slave holdover stability
- Partial timing support (e.g. G.8275.2) for networks without full timing at every node
The design may incorporate an OCXO to provide IEEE 1588 slave functions and timing holdover capability. Partial timing support is available for profiles such as G.8275.2, enabling synchronisation over networks without full timing support at every node. The default PTP profile is used to set clock-port parameters for synchronisation unless a specific alternative profile is configured. Timing failover operation can be either revertive or non-revertive.
Additionally, we provide IT security audit services to assess network infrastructures comprehensively. This includes identifying potential vulnerabilities, implementing safety measures, and ensuring compliance with industry standards.
Supported Applications

Boundary Clock in IEEE 1588 Networks
PTP synchronisation profiles, introduced in IEEE 1588-2008, facilitate the adoption of PTP by various standards bodies (e.g. ITU-T, IETF, SMPTE, AES, IEC, Avnu, AUTOSAR, LXI, AIA) for specific applications such as financial/enterprise, professional broadcast, power industry, and test and measurement. Some profiles, such as G.8275.2, are designed to provide partial timing support, enabling accurate synchronization over networks without requiring full timing support from every node.

Our engineers enable support of the following profiles:
IEEE Std 1588-2019 for generic applications
G8275.1, G.8265.1 for telecom industry
IEEE Std 802.1AS for audio/video, industrial automation, and automotive applications
Our Tech Stack
IEEE 1588-2008 | IEEE 802.1AS-2020 | ITU-T G.8265.1 | ITU-T G.8275.1 | ITU-T G.8275.2 | SMPTE ST-2059-2
PHC | Timestamp unit | Servo | PPS in/out | GNSS | Ordinary clock | Transparent clock | Boundary clock
5G/6G telecom systems | Multimedia broadcasting | Financial trading | Industrial automation
Servo algorithm | two/one-step sync mode | e2e/p2p delay mechanism | l2/l4 transport | SyncE usage | Domain number | PHC time format | Messages timings | BMCA method | Unicast/Multicast
Microchip | Realtek | NVIDIA | Broadcom | linuxptp | PTPd
Our Case Studies in Telecom
Do you want to implement IEEE 1588 functionality for your project?
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FAQ
What are the key areas of implementation for PTP?
How does IEEE 1588 PTP work?
The protocol determines the server and client operating modes, as well as the master and slave parts synchronisation messages. The slave synchronises with the master, which is the source of time. A master synchronised to a time reference, such as GPS or CDMA, is called a grandmaster.
- Master sync messages
- Master delay response messages
- Slave delay request messages
The BMC technique enables several masters to agree upon the best clock for the network in addition to the messages.
At least one master and one slave are needed for synchronisation via LAN. A single master can synchronise with several slaves. The slaves use synchronisation messages from the masters to adjust their local ones. All of them record exact timestamps.