
Ready-to-use IP Core
C37.94 Transceiver for Teleprotection Equipment
Promwad developed the C37.94 Transceiver IP Core for teleprotection equipment with full test coverage.
This design is available for sale to companies that want to significantly reduce the time required to implement FPGA-based projects.
The C37.94 Transceiver IP Core features:
- fully compatible with standard IEEE Std C37.94â„¢-2017;
- support 1 to 12 time slots;
- master and slave modules available;
- internal clock data recovery;
- status flags:
- ​yellow flag;
- ​los;
- ​ylos; no activity control;
- ​all ones mode;
- ​headers control;
- ​bit error (three consecutive ones or zeroes in payload).
- error injection for standalone IP core simulation.

C37.94 IP core top view
IP core C37.94 structure diagram

Deliverables: Sales Package for C37.94 Transceiver IP Core
- Source code (VHDL)
- IP Core testbench and scripts
- Datasheet
Upgrade and Technical Support
Promwad provides free remote technical support for 1 year from the date of the IP core purchase. It includes consultation via phone, e-mail, and Skype. The maximum time for processing a request for technical support is 3 business days.
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IMPORTANT NOTE: The overall free remote technical support will be limited to 60 hours. All over-limit hours will be charged on T&M basis.
Extra Engineering NotesÂ
C37.94 interfaces, as defined by IEEE C37.94TM-2002, are optical interfaces that transfer relay protection information between teleprotection devices and digital multiplexers over optical fibre channels. The data frame format and rate range for C37.94 connections are standard.
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C37.94 interfaces connect users' relay protection devices to the router, allowing data services for leased line connectivity to be transmitted transparently.
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The most frequent channels to transmit teleprotection information are 64 kbit/s and 2 Mbit/s. On the other hand, the low transmission bandwidth of 64 kbit/s channels hinders the delivery of teleprotection information. Furthermore, when 64 kbit/s channels are employed, digital multiplexers often require 64 kbit/s codirectional interfaces that must be connected to the electric power communication networks via pulse code modulation devices. This method lengthens the signal transmission time and introduces more interference.
Our FPGA design projects
Would you like to use our IP core for your teleprotection equipment and embed it into your FPGA-based project?
Drop us a line about your project! We will contact you today or the next business day. All submitted information will be kept confidential.