JTAG (IEEE 1149.1 standard) widely used by semiconductor manufacturers for testing and debugging of electronic components. We use our proprietary JTAG solutions in embedded systems development.
JTAG testing and programmming
- PCB testing and verification for technology defects (linkage, interconnection, short circuit)
- Configuration of programmable devices (microcontrollers, PLDs)
- Configuration and programming of FLASH, EEPROM, FRAM
- In-circuit debug and monitoring, OCD (On Chip Debug)
- Functional verification (ASIC, FPGA)
- Import and analysis of BSDL (Boundary Scan Description Language) files for chips of various manufacturers
- SVF (Serial Vector Format) test suite creation for circuit testing
The Promwad Innovation Company develops tests according to IEEE1149.1 and IEEE1149.6 standards, performs a DFT analysis of integrated circuits and issues recommendations for enhancing testability and increasing test coverage.
IEEE1149.1 testing helps detect the following defects:
- Accurate installation of Pull-up/Pull-down resistors
- Installation integrity of the outputs of a device with IEEE1149.1 support
- Circuit integrity
- Testing of address, data and control buses for different types of SDRAM memory (SDR, DDR, DDR2, DDR3), which is important for running functional tests
- ID testing, as well as testing of address, data and control buses for different types of FLASH-memory
- Interactive testing involving human subjects (LEDs, buttons, etc.)
- Testing of digital interfaces, such as SMI, I2C, TDM, SPI, UART (only for devices with loopback support), SDIO, etc.
IEEE1149.6 testing also helps check high-speed interfaces (LVDS, SerDes) which have DC decoupling (series-connected capacities) in their circuits.
The circuit shown in Figure 1 cannot be tested in compliance with IEEE1149.1. Thus, testing standards depend on the chip. A specific standard should be stipulated in the chip specification.
It is important to bear in mind that JTAG testing only checks the integrity of the bonds, but not their quality (impedance, stray capacitance, etc.: these parameters can significantly affect the performance of high-speed circuits).
It is impossible to find installation defects related to digital or analog elements that do not have JTAG support. Diagnostics of defects in the bonds between them is also unavailable.
It is impossible to perform functional tests or fault detection tests which are certain time functions.
It is impossible to perform tests to detect such defects in the data bus, such as jitter, crosstalk, interference, etc. (PCI bus tests).
Figure 1. DC decoupled differential interface